Exciter Model: ESST7B and ST7B
Following checks and corrections are applied during Validation and AutoCorrection.
- If 0.0 < Tr < 0.25*Mult*TimeStep then Tr = 0.0
ElseIf 0.25*Mult*TimeStep < Tr < 0.5*Mult*TimeStep then Tr = 0.5*Mult*TimeStep - If 0.0 < Ts < 0.5*Mult*TimeStep then Ts = 0, ElseIf 0.5*Mult*TimeStep < Ts < Mult*TimeStep then Ts = Mult*TimeStep
- If Vrmax < Vrmin then swap the values
- If Vmax < Vmin then swap the values
Mult represents the user-specified value Minimum time constant size as multiple of time step option on the Validation page of the Transient Stability Dialog
TimeStep represents the integration time step being used as described on TimeStep
Following treatment is handled during the transient numerical simulation
- If Vr > Vrmax, then Vrmax = Vr or if Vr < Vrmin, then Vrmin = Vr
- If Vref > Vmax, then Vmax = Vref or if Vref < Vmin, then Vmin = Vref
Model Equations and/or Block Diagrams
Parameters for ESST7B:
| Tr | Filter time constant, sec. |
| Kpa | Regulator proportional gain, p.u. (> 0.) |
| Kia | Feedback gain, p.u.. (> 0.) |
| Tia | Feedback time constant, sec.. |
| Tb | Lead-lag denominator time constant, sec. |
| Tc | Lead-lag numerator time constant, sec. |
| Tf | Input lead-lag denominator time constant, sec. |
| Tg | Input lead-lag numerator time constant, sec. |
| Kl | Low-value gate feedback gain, p.u. |
| Kh | High-value gate feedback gain, p.u. |
| Vrmax | Maximum field voltage output, p.u. |
| Vrmin | Minimum field voltage output, p.u. |
| Vmax | Maximum voltage reference signal, p.u. |
| Vmin | Minimum voltage reference signal, p.u. |
| UEL | UEL input selector: 1 – add to Vref, 2 – input HV gate, 3 – output HV gate, 0 – no UEL input |
| OEL | OEL input selector: 1 – add to Vref, 2 – input LV gate, 3 – output LV gate, 0 – no OEL input |
| Ts | Rectifier firing time constant, sec. (not in IEEE model) |
Parameters for ST7B:
| OEL | OEL input selector: 1 – add to Vref, 2 – input LV gate, 3 – output LV gate, 0 – no OEL input |
| UEL | UEL input selector: 1 – add to Vref, 2 – input HV gate, 3 – output HV gate, 0 – no UEL input |
| Tr | Filter time constant, sec. |
| Tg | Input lead-lag numerator time constant, sec. |
| Tf | Input lead-lag denominator time constant, sec. |
| Vmax | Maximum voltage reference signal, p.u. |
| Vmin | Minimum voltage reference signal, p.u. |
| Kpa | Regulator proportional gain, p.u. (> 0.) |
| Vrmax | Maximum field voltage output, p.u. |
| Vrmin | Minimum field voltage output, p.u. |
| Kh | High-value gate feedback gain, p.u. |
| Kl | Low-value gate feedback gain, p.u. |
| Tc | Lead-lag numerator time constant, sec. |
| Tb | Lead-lag denominator time constant, sec. |
| Kia | Feedback gain, p.u.. (> 0.) |
| Tia | Feedback time constant, sec. |